SI5512C-B15101-GMR

The Si5512B NetSync™ Network Synchronizer Clock utilizes fifth-generation DSPLL™ and MultiSynth™ technologies and combines the functions of a SyncE/IEEE 1588 PTP network synchronizer clock with a low phase noise 5G/eCPRI wireless jitter attenuator supporting JESD204B/C into a single IC device. The Si5512B is optimized for 5G wireless applications which demand the highest level of integration and phase noise performance with low power consumption that reduces the total solution cost. This highly integrated digital solution eliminates external loop filter components and has high immunity to external board disturbances such as power supply noise. The DSPLL bandwidth is digitally programmable to values as low as 0.001 Hz. With phase jitter as low as 47 fs RMS, the Si5512B accepts 4/6 inputs clock ranging from 0.008 - 1000 MHz differential and PPS/PP2S, 8kHz to 250MHz for CMOS. Si5512B generates up to 12 clock outputs that are configurable in any combination of DCLK, SYSREF or other system clocks. Each output supports delay/skew adjust and frequencies ranging from PPS/PP2S up to 3200 MHz. The Si5512B meets all the requirements specified by ITU-T G.8262 EEC Options 1 & 2 and ITU-T G.8262.1. When used with external IEEE 1588 stack and servo loop software the Si5512B meets the requirements of ITU-T G.8273.2 (T-TSC, T-BC), ITU-T G.8273.4 (T-BC-P, T-BC-A, T-TSC-P, T-TSC-A) and G.8273.1 (T-GM). Si5512B supports Skyworks AccuTime™ IEEE 1588 software(opens in a new tab). This device is supported by Skyworks AccuTime™ IEEE 1588 software.